1. Field of the Invention
The present invention relates to integrated circuits operating with multiple supply voltages of different magnitudes, and more specifically to a method and apparatus for avoiding excessive cross_terminal voltages of low voltage transistors due to undesirable supply_sequencing in environments with higher supply voltages.
2. Related Art
Integrated circuits are some times implemented with low voltage transistors in high voltage environments. A low voltage transistor is characterized by a correspondingly having a correspondingly low value for the maximum permissible cross terminal voltage. Exposure of the low voltage transistor to higher cross terminal voltage (than permissible cross terminal voltage) may reduce the lifetime of the low voltage transistor, as is well known in the relevant arts.
A high voltage environment is characterized by a high supply voltage (which is used to operate the various low voltage transistors). The word high implies that the supply voltage is more than the maximum permissible cross terminal voltage of the transistors. Using a high supply voltage generally provides a correspondingly high signal to noise ratio (SNR), typically leading to less susceptiblity to noise in processing input signals.
Integrated circuits are often designed to operate with multiple supply voltages, with one or more of them constituting higher supply voltages. Such multiple supply voltages with different magnitudes enable some portion of integrated circuits to operate from one magnitude of supply voltages, and other portions to operate from another magnitude of supply voltages.
Such designs may be chosen, for example, since low voltage transistors operate with higher throughput performance and low power consumption, and higher supply voltage may be used ether to conform with interface specifications of external devices or for higher SNR, as noted above.
One problem with the use multiple supply voltages is that some supply voltages may be operational while others are not (operational), since some of such situations lead to applications of cross terminal voltages exceeding the maximum permissible values (noted above) when low voltage transistors are being operated with high supply voltages. Such excessive cross terminal voltages may be applied, for example, because portions of the integrated circuit which avoid such application, may be non-operational in the corresponding situation(s).
Such situations are of particularly likely to occur during the power-up or power-down of the devices using the integrated circuit since different supply voltages could “come up” (during power-up, or “come down” during power down) at different time instances, albeit within a short duration. The sequence in which the power supplies come up (or come down) is referred to as supply sequencing.
From the above, it may be appreciated that an undesirable supply sequencing may lead to excessive cross terminal voltages being applied across low voltage transistors. What is therefore needed is a method and apparatus to avoid excessive cross_terminal voltages of low voltage transistors due to undesirable supply_sequencing in environments with higher supply voltages.